IP Library Assignment 045847/0568
Patent Assignment
Reel/Frame 045847/0568

Assignment of Assignor's Interest

Recorded: 2018-05-18 Pages: 4
Assignors
LIN, CHENG-MU
Executed: 2018-04-18
LIAO, CHI-HUNG
Executed: 2018-04-18
DAI, YI-MING
Executed: 2018-04-18
YANG, YUEH LIN
Executed: 2018-04-18
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN ROAD 6, HSINCHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property (1)
System and Method for Correcting Non-Ideal Wafer Topography
Application: 15/941,568 →
Publication: US 2019/0035664