Patent Assignment
Reel/Frame 046572/0455
Assignment of Assignor's Interest
Recorded: 2018-08-07
Pages: 4
Assignor
WANG, LEE
Executed: 2018-08-01
Assignee
FLASHSILICON INCORPORATION
1111 RANCHWOOD PLACE, DIAMOND BAR, CALIFORNIA, 91765
Covered Property
(1)
Memory Cell Size Reduction for Scalable Logic Gate Non-Volatile Memory Arrays
Patent:
10,431,308 →
Application:
16/055,614 →