Patent Assignment
Reel/Frame 046691/0289
Assignment of Assignor's Interest
Recorded: 2018-08-24
Pages: 4
Assignors
WEI, YING-CHUN
Executed: 2018-08-20
HSIEH, MIN-HANG
Executed: 2018-08-20
YANG, JEN-HANG
Executed: 2018-08-20
Assignee
MEDIATEK INC.
NO. 1, DUSING RD. 1ST, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300, TAIWAN
Covered Property
(1)
Full Adder Circuits with Reduced Delay