Assignment of Assignor's Interest

Recorded: 2018-10-25 Pages: 3

Assignor

JAKLIC, JANEZ

Executed: 2018-09-11

Assignee

CADENCE DESIGN SYSTEMS, INC.

2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134

Covered Property (1)

Error-Controlled Discretization of Parametric Curves for Integrated Circuit Design and Manufacture

Patent: 10,620,531 →

Application: 16/165,887 →