Patent Assignment
Reel/Frame 048244/0550
Assignment of Assignor's Interest
Recorded: 2019-02-05
Pages: 7
Assignors
ALEXANDER, MICHAEL
Executed: 2019-01-23
HAN, KWANGSOO
Executed: 2019-01-24
LI, ZHUO
Executed: 2019-02-04
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Honoring Pin Insertion Delay During Clock Tree Synthesis
Patent:
10,614,261 →
Application:
16/268,327 →