IP Library Assignment 048746/0291
Patent Assignment
Reel/Frame 048746/0291

Assignment of Assignor's Interest

Recorded: 2019-03-29 Pages: 2
Assignors
KUMAR, KAUSTUBH
Executed: 2019-03-16
BALASUBRAMANIAN, PAVITRA
Executed: 2019-03-16
Assignee
SILICONCH SYSTEMS PVT LTD
#119, 2ND FLOOR, 3RD CROSS, 1ST PHASE, RELIABLE RESIDENCY, HARALUR, BANGALORE, KARNATAKA, 560102, INDIA
Covered Property (1)
System and Method for Implementing Verification Ip for Pre-Silicon Functional Verification of a Layered Protocol
Application: 16/370,654 →
Publication: US 2020/0311225
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Merger Apr 22, 2026
From: SILICONCH SYSTEMS PRIVATE LIMITED
To: L&T SEMICONDUCTOR TECHNOLOGIES LIMITED
Reel/Frame 075446/0549 →