Patent Assignment
Reel/Frame 048795/0921
Assignment of Assignor's Interest
Recorded: 2019-04-04
Pages: 7
Assignors
KIM, SHIN-WOONG
Executed: 2018-09-18
KIM, JAE-YOUNG
Executed: 2018-09-18
KIM, CHUL-HO
Executed: 2018-09-18
JANG, JAE-HYUK
Executed: 2018-09-18
HAN, SANG-WOOK
Executed: 2018-09-19
Assignee
SAMSUNG ELECTRONICS CO., LTD.
129, SAMSUNG-RO, YEONGTONG-GU, SUWON-SI, GYEONGGI-DO, 16677, KOREA, REPUBLIC OF
Covered Property
(1)
Phase Locked Loop Circuits, Clock Signal Generators Comprising Digital-to-Time Convert Circuits, Operating Methods Thereof and Wireless Communication Devices