Patent Assignment
Reel/Frame 049069/0007
Assignment of Assignor's Interest
Recorded: 2019-05-03
Pages: 4
Assignors
BALADHANDAPANI, NIGESH
Executed: 2019-04-30
MELKUNDI, SHARANAPRASAD
Executed: 2019-04-30
J, RAJA PRABHU
Executed: 2019-04-30
MARQUES, AUGUSTO
Executed: 2019-04-30
Assignee
AURA SEMICONDUCTOR PVT. LTD
RMZ ECOWORLD SEZ, BUILDING 4C, DEVARABEESANAHALLI, OUTER RING ROAD, BANGALORE, 560103, INDIA
Covered Property
(1)
Avoiding Very Low Duty Cycles in a Divided Clock Generated by a Frequency Divider
Related Assignments
(1)
Other recorded transfers of the patent in this record — the chain of ownership.