Patent Assignment
Reel/Frame 050202/0676
Assignment of Assignor's Interest
Recorded: 2019-08-28
Pages: 4
Assignors
NERUKONDA, RAMBABU
Executed: 2019-08-27
HARTANTO, ISMED D.
Executed: 2019-08-27
MATHEW, AARON K.
Executed: 2019-08-26
Assignee
XILINX, INC.
2100 LOGIC DRIVE, SAN JOSE, CALIFORNIA, 95124
Covered Property
(1)
Method to Compress Responses of Automatic Test Pattern Generation (Atpg) Vectors into an on-Chip Multiple-Input Shift Register (Misr)
Patent:
10,969,433 →
Application:
16/554,059 →