Patent Assignment
Reel/Frame 050473/0793
Assignment of Assignor's Interest
Recorded: 2019-09-24
Pages: 4
Assignors
WU, CHUNG-CHIANG
Executed: 2019-09-17
CHEN, PO-CHENG
Executed: 2019-09-17
HUANG, KUO-CHAN
Executed: 2019-09-17
CHUNG, HUNG-CHIN
Executed: 2019-09-17
LEE, HSIEN-MING
Executed: 2019-09-17
CHEN, CHIEN-HAO
Executed: 2019-09-17
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Gate Resistance Reduction Through Low-Resistivity Conductive Layer