IP Library Assignment 050981/0076
Patent Assignment
Reel/Frame 050981/0076

Assignment of Assignor's Interest

Recorded: 2019-11-12 Pages: 8
Assignors
YU, KAI-HUNG
Executed: 2019-11-08
O'MEARA, DAVID
Executed: 2019-11-08
JOY, NICHOLAS
Executed: 2019-11-08
PATTANAIK, GYANARANJAN
Executed: 2019-11-08
CLARK, ROBERT
Executed: 2019-11-11
TAPILY, KANDABARA
Executed: 2019-11-08
HAKAMATA, TAKAHIRO
Executed: 2019-11-12
WAJDA, CORY
Executed: 2019-11-08
LEUSINK, GERRIT
Executed: 2019-11-12
Assignee
TOKYO ELECTRON LIMITED
AKASAKA BIZ TOWER, 3-1 AKASAKA 5-CHOME, MINATO-KU, TOKYO, 107-6325, JAPAN
Covered Property (1)
Method for Filling Recessed Features in Semiconductor Devices with a Low-Resistivity Metal
Application: 16/598,772 →
Publication: US 2020/0118871