Patent Assignment
Reel/Frame 051478/0505
Assignment of Assignor's Interest
Recorded: 2020-01-10
Pages: 14
Assignors
MANIPATRUNI, SASIKANTH
Executed: 2019-12-27
MENEZES, ROBERT
Executed: 2019-12-27
FANG, YUAN-SHENG
Executed: 2019-12-31
DOKANIA, RAJEEV KUMAR
Executed: 2019-12-27
THAREJA, GAURAV
Executed: 2019-12-27
RAMESH, RAMAMOORTHY
Executed: 2019-12-27
Assignee
KEPLER COMPUTING INC.
135 DORE STREET, SAN FRANCISCO, CALIFORNIA, 94103
Covered Property
(1)
Linear Input and Non-Linear Output Majority Logic Gate
Patent:
11,018,672 →
Application:
16/729,275 →
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.
Corrective Assignment to Correct the Correct Inventor Previously Recorded at Reel: 051478 Frame: 0505. Assignor(S) Hereby Confirms the Assignment.
Jan 28, 2020
From: MANIPATRUNI, SASIKANTH; MENEZES, ROBERT; FANG, YUAN-SHENG; DOKANIA, RAJEEV KUMAR
To: KEPLER COMPUTING INC.
Reel/Frame 051723/0623 →
Corrective Assignment to Correct the Name of Inventor Previously Recorded at Reel: 051723 Frame: 0623. Assignor(S) Hereby Confirms the Inventorship.
Sep 23, 2021
From: MANIPATRUNI, SASIKANTH; MENEZES, ROBERT; FANG, YUAN-SHENG; DOKANIA, RAJEEV KUMAR
To: KEPLER COMPUTING INC.
Reel/Frame 057593/0554 →