Patent Assignment
Reel/Frame 051560/0882
Assignment of Assignor's Interest
Recorded: 2020-01-21
Pages: 8
Assignors
LAI, YA-CHUN
Executed: 2019-12-26
WU, PO-HSUN
Executed: 2019-12-26
HSU, JEN-SHOU
Executed: 2019-12-28
Assignee
ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
NO 23, INDUSTRY E. ROAD IV, HSINCHU SCIENCE PARK, HSINCHU, TAIWAN
Covered Property
(1)
Target Row Refresh Mechanism Capable of Effectively Determining Target Row Address to Effectively Mitigate Row Hammer Errors Without Using Counter Circuit
Patent:
10,916,293 →
Application:
16/747,553 →
Related Assignments
(1)
Other recorded transfers of the patent in this record — the chain of ownership.