IP Library Assignment 071703/0241
Patent Assignment
Reel/Frame 071703/0241

Change of Name

Recorded: 2025-06-25 Pages: 7
Assignor
Assignee
ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
NO 23, INDUSTRY E. ROAD IV, HSINCHU SCIENCE PARK, HSINCHU, TAIWAN
Covered Properties (54)
Flash Memory Device and Associated Charge Pump Circuit
Patent: 8,848,476 →
Application: 13/105,467 →
Publication: US 2012/0287717
Circuit and Method for Outputting Refresh Execution Signal in Memory Device
Patent: 9,047,977 →
Application: 13/105,673 →
Publication: US 2012/0287742
Apparatus and Method for Trimming Reference Cell in Semiconductor Memory Device
Patent: 8,693,266 →
Application: 13/276,779 →
Publication: US 2013/0100734
Configurable Electrostatic Discharging Power Clamp and Related Integrated Circuit
Patent: 8,995,100 →
Application: 13/430,649 →
Publication: US 2013/0249046
Bandgap Reference Circuit for Providing Reference Voltage
Patent: 8,698,479 →
Application: 13/434,856 →
Publication: US 2013/0257396
Circuit for Sensing Multi-Level Cell
Patent: 8,817,564 →
Application: 13/476,749 →
Publication: US 2013/0308404
Circuit for Sensing Mlc Flash Memory
Patent: 8,913,442 →
Application: 13/725,648 →
Publication: US 2014/0177334
Oscillation Control Circuit for Biasing Ring Oscillator by Bandgap Reference Signal and Related Method
Patent: 9,300,276 →
Application: 13/736,085 →
Publication: US 2014/0191814
Nonvolatile Semiconductor Memory Device Programmable via Overlapping Pulse Signals
Patent: 8,995,187 →
Application: 13/760,969 →
Publication: US 2014/0219029
Semiconductor Memory Device Having Compression Test Mode
Patent: 9,484,117 →
Application: 13/859,539 →
Publication: US 2014/0301149
Redundancy Evaluation Circuit for Semiconductor Device
Patent: 9,082,511 →
Application: 13/912,827 →
Publication: US 2014/0362654
Nonvolatile Semiconductor Memory Device
Patent: 9,013,925 →
Application: 13/947,196 →
Publication: US 2015/0023109
Duty Cycle Correction Circuit
Patent: 8,773,186 →
Application: 13/957,004 →
Method of Booting System Having Non-Volatile Memory Device with Erase Checking and Calibration Mechanism and Related Memory Device
Patent: 9,298,557 →
Application: 14/010,475 →
Publication: US 2015/0058613
Method for Auto-Refreshing Memory Cells in Semiconductor Memory Device and Semiconductor Memory Device Using the Method
Patent: 9,117,546 →
Application: 14/032,159 →
Publication: US 2015/0078112
Input Buffer with Current Control Mechanism
Patent: 9,118,320 →
Application: 14/094,809 →
Publication: US 2015/0155873
Memory Test System and Method
Patent: 9,229,059 →
Application: 14/099,318 →
Publication: US 2015/0162096
Triangular Wave Generating Circuit to Provide Clock Synchronization
Patent: 9,300,281 →
Application: 14/156,264 →
Publication: US 2015/0200659
Programmable Voltage Generator for Nonvolatile Memory Device
Patent: 9,275,691 →
Application: 14/221,939 →
Publication: US 2015/0269975
Voltage Regulator
Patent: 9,147,444 →
Application: 14/222,024 →
Publication: US 2015/0269976
Method for Programming Selected Memory Cells in Nonvolatile Memory Device and Nonvolatile Memory Device Thereof
Patent: 9,378,822 →
Application: 14/280,606 →
Publication: US 2015/0332769
Test System and Device
Patent: 9,575,114 →
Application: 14/315,127 →
Publication: US 2015/0019927
Modulation Method for Switching Modulator
Patent: 9,325,283 →
Application: 14/487,178 →
Publication: US 2016/0079938
Quaternary/Ternary Modulation Selecting Circuit and Associated Method
Patent: 9,654,068 →
Application: 14/656,731 →
Publication: US 2016/0268984
Semiconductor Device for Driving Sub Word Lines
Patent: 9,373,378 →
Application: 14/669,092 →
Protection Circuit for Preventing an Over-Current from an Output Stage
Patent: 9,705,315 →
Application: 14/685,611 →
Publication: US 2016/0308352
Method for Enhancing Temperature Efficiency
Patent: 9,525,424 →
Application: 14/693,219 →
Publication: US 2016/0315624
Duty Cycle Correction Apparatus
Patent: 9,413,347 →
Application: 14/955,488 →
Control Circuit Applied in E-Fuse System and Related Method
Patent: 9,479,169 →
Application: 14/979,584 →
Quaternary/Ternary Modulation Selecting Circuit and Associated Method
Patent: 9,660,588 →
Application: 14/986,737 →
Variable Gain Amplifying Circuit
Patent: 9,748,911 →
Application: 14/990,836 →
Publication: US 2017/0201220
Apparatus with Load Dump Protection
Application: 15/176,399 →
Publication: US 2017/0358918
Bandgap Reference Circuit
Patent: 9,600,013 →
Application: 15/182,801 →
Bandgap Reference Circuit for Providing a Stable Reference Voltage at a Lower Voltage Level
Application: 15/220,709 →
Publication: US 2018/0032097
Method for Determining Resistance Calibration Direction in Zq Calibration of Memory Device
Patent: 9,871,517 →
Application: 15/239,806 →
Memory Auto Repairing Circuit Preventing Transmission of an Enable Signal and Associated Method
Application: 15/378,073 →
Publication: US 2018/0166153
Level Shifting Circuit and Integrated Circuit
Patent: 9,859,894 →
Application: 15/415,978 →
Memory Device Capable of Determining Candidate Wordline for Refresh and Control Method Thereof
Patent: 9,805,782 →
Application: 15/422,488 →
Clock Generating Circuit and Associated Method
Patent: 9,977,459 →
Application: 15/484,149 →
Reference Voltage Pre-Processing Circuit and Reference Voltage Pre-Processing Method for a Reference Voltage Buffer
Patent: 9,997,230 →
Application: 15/628,203 →
Bootstrap Circuit and Associated Direct Current-to-Direct Current Converter Applying the Bootstrap Circuit
Application: 15/806,307 →
Oscillator and Associated Direct Current-to-Direct Current Converter Applying the Oscillator
Application: 15/806,337 →
Erasing Method for Flash Memory Using a Memory Management Apparatus
Application: 15/902,325 →
Publication: US 2019/0259461
Quaternary/Ternary Modulation Selecting Circuit and Associated Method
Application: 15/922,908 →
Publication: US 2019/0288652
Amplifier Circuit with Low Malfunction Rate
Application: 16/242,011 →
Publication: US 2020/0220501
Semiconductor Memory Device and Word-Line Activation Method
Application: 16/354,138 →
Publication: US 2020/0294570
E-Fuse Circuit
Application: 16/442,536 →
Synchronization Circuit and Cascaded Synchronization Circuit for Converting Asynchronous Signal into Synchronous Signal
Application: 16/565,505 →
Publication: US 2021/0072785
Power-on Over-Erasure Correction Method and Memory Device Utilizing Same
Application: 16/565,518 →
Publication: US 2021/0074371
E-Fuse Burning Circuit and E-Fuse Burning Method
Application: 16/576,727 →
Valley-Fill Pfc Circuit with Emi Protection
Application: 16/735,633 →
Publication: US 2021/0211042
Target Row Refresh Mechanism Capable of Effectively Determining Target Row Address to Effectively Mitigate Row Hammer Errors Without Using Counter Circuit
Application: 16/747,553 →
Pulse Width Modulation Output Stage with Dead Time Control
Application: 16/837,634 →
Publication: US 2020/0389161
Constant on-Time Controller and Buck Regulator Device Using the Same
Application: 16/850,029 →
Related Assignments (18)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest May 11, 2011
From: KUO, CHUNG SHAN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 026262/0009 →
Assignment of Assignor's Interest May 11, 2011
From: CHEN, CHUNG ZEN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 026263/0639 →
Corrective Assignment to Correct the Assignee's Address and Insert the Filing Date of May 11, 2011 Previously Recorded on Reel 026262 Frame 0009. Assignor(S) Hereby Confirms the Assignment of Assignor's Interest. May 27, 2011
From: KUO, CHUNG SHAN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 026357/0426 →
Assignment of Assignor's Interest Oct 19, 2011
From: KUO, CHUNG-SHAN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY, INC.
Reel/Frame 027088/0077 →
Assignment of Assignor's Interest Mar 26, 2012
From: CHOU, HSIANG-MING; PAN, KUO-LIANG; TSENG, CHIEN-FENG; TSAI, YI-CHIU
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 027930/0517 →
Assignment of Assignor's Interest Mar 30, 2012
From: TUNG, MING-SHENG
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 027960/0175 →
Assignment of Assignor's Interest May 21, 2012
From: TSAI, CHENG-HUNG
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 028243/0355 →
Assignment of Assignor's Interest Dec 21, 2012
From: CHEN, CHUNG ZEN; HUANG, YI SHIN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 029522/0651 →
Assignment of Assignor's Interest Jan 8, 2013
From: TUNG, MING-SHENG
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 029581/0798 →
Assignment of Assignor's Interest Feb 6, 2013
From: TSAI, CHENG-HUNG
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 029767/0715 →
Assignment of Assignor's Interest Apr 10, 2013
From: HSU, JEN-SHOU
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 030191/0024 →
Assignment of Assignor's Interest Jun 7, 2013
From: LAI, YA-CHUN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 030569/0424 →
Assignment of Assignor's Interest Jul 22, 2013
From: TSAI, CHENG-HUNG
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 030845/0564 →
Assignment of Assignor's Interest Aug 1, 2013
From: LIOU, JIAN-SING; NIEN, SHU-HAN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 030926/0635 →
Assignment of Assignor's Interest Aug 26, 2013
From: KUO, CHUNG-SHAN; CHEN, CHIH-HAO
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 031085/0703 →
Assignment of Assignor's Interest Sep 19, 2013
From: HUANG, MING-CHIEN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 031244/0732 →
Assignment of Assignor's Interest Dec 3, 2013
From: CHOU, MIN-CHUNG
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 031701/0792 →
Assignment of Assignor's Interest Mar 21, 2014
From: CHEN, CHUNG-ZEN
To: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
Reel/Frame 032499/0321 →