Valley-fill PFC circuit with EMI protection

1. An power control circuit, comprising:

an alternating current (AC) power source, configured to receive an AC voltage;

a rectifier, configured to convert the AC voltage into a rectified voltage;

a valley-fill circuit, comprising:

an inductor, having a first terminal coupled to the rectifier, and a second terminal;

a first resistor, having a first terminal coupled to the second terminal of the inductor, and a second terminal;

a diode, having a cathode coupled to the second terminal of the inductor, and an anode;

a first capacitor, having a first terminal coupled to the second terminal of the first resistor and the anode of the diode, and a second terminal coupled to ground;

a second resistor, having a first terminal coupled to the first terminal of the inductor, and a second terminal coupled to the first terminal of the first resistor; and

a second capacitor, having a first terminal coupled to the first terminal of the second resistor, and a second terminal coupled to ground.

2. The power control circuit of claim 1 , wherein the rectifier is a diode-bridge rectifier.

3. The power control circuit of claim 1 , wherein the valley-fill circuit is further coupled to an DC-to-DC converter to provide a constant current or a constant voltage output for an LED driving circuit.

4. The power control circuit of claim 3 , wherein a switched-mode power supply (SMPS) is coupled between the valley-fill circuit and the LED driving circuit.

5. The power control circuit of claim 1 , further comprising:

a metal-oxide varistor (MOV) unit, coupled between the AC power source and the rectifier; and

a fuse 220 , coupled between the AC power source and the MOV unit.

6. The power control circuit of claim 1 , wherein the valley-fill circuit further comprises:

a third capacitor, having a first terminal coupled to the first terminal of the first resistor, and a second terminal coupled to ground.

7. The power control circuit of claim 1 , wherein the output of the valley-fill circuit is in form of a rectified sinusoidal wave.

8. The power control circuit of claim 1 , wherein the first capacitor is charged through the inductor and the first resistor, and the first capacitor is discharged through the diode.

9. An power control circuit, comprising:

an alternating current (AC) power source, configured to receive an AC voltage;

a rectifier, configured to convert the AC voltage into a rectified voltage;

a valley-fill circuit, comprising:

an inductor, having a first terminal coupled to the rectifier, and a second terminal;

a first resistor, having a first terminal coupled to the second terminal of the inductor, and a second terminal;

a diode, having a cathode coupled to the second terminal of the inductor, and an anode; and

a first capacitor, having a first terminal coupled to the second terminal of the first resistor and the anode of the diode, and a second terminal coupled to ground;

wherein the output of the valley-fill circuit is in form of a rectified sinusoidal wave, and the capacitance of the first capacitor meets following equations:

C

V

≥

I

Load

,

max

×

t

Hold

Δ

⁢

⁢

V

C

;

t

Hold

=

1

2

⁢

π

⁢

⁢

f

⁢

(

sin

-

1

⁢

V

1

V

m

,

min

+

sin

-

1

⁢

V

2

V

m

,

min

)

;

1

2

⁢

f

-

t

Hold

=

t

c

⁢

h

⁢

g

;

I

c

⁢

h

⁢

g

=

V

m

,

min

-

Δ

⁢

V

C

R

V

;

Δ

⁢

V

c

=

I

c

⁢

h

⁢

g

*

t

c

⁢

h

⁢

g

C

V

;

Δ

⁢

V

C

V

m

,

min

=

t

c

⁢

h

⁢

g

R

V

⁢

C

V

+

t

c

⁢

h

⁢

g

;

(

V

m

,

min

Δ

⁢

V

c

-

1

)

⁢

t

c

⁢

h

⁢

g

C

V

≤

R

V

;

 wherein C V represents the capacitance of the first capacitor, ΔV C represents the voltage variation of the capacitance V C , I load,max represents the maximum current on the output load, ½f represents a cycle of the rectified sinusoidal wave, V 1 represents an initial level of the rectified sinusoidal wave during a capacitor discharging time, V 2 represents a final level of the rectified sinusoidal wave during the capacitor discharging time, V m,min represents the minimum of the peak value of the voltage amplitude V m , t Hold represents the capacitor discharging time, t chg represents the capacitor charging time, I chg represents the charging current, and R V represents the resistance of the first resistor.