Assignment of Assignor's Interest

Recorded: 2020-01-24 Pages: 3

Assignors

CHHABRA, PRAVEEN KUMAR

Executed: 2020-01-24

GOYAL, DEVRAJ

Executed: 2020-01-23

TIWARI, AMIT KUMAR

Executed: 2020-01-22

SINGLA, MANISHA

Executed: 2020-01-23

Assignee

CADENCE DESIGN SYSTEMS, INC.

2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134

Covered Property (1)

Method and Apparatus to Accelerate Verification Signoff by Selective Re-Use of Integrated Coverage Models

Patent: 11,036,906 →

Application: 16/751,623 →