Patent Assignment
Reel/Frame 051803/0566
Assignment of Assignor's Interest
Recorded: 2020-02-12
Pages: 2
Assignors
LIN, WAN-YEN
Executed: 2019-12-10
CHAN, YUAN-JU
Executed: 2019-12-10
CHEN, BO-TING
Executed: 2019-12-10
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK, HSINCHU, 300, TAIWAN
Covered Property
(1)
Logic Buffer Circuit and Method