Patent Assignment
Reel/Frame 052003/0392
Assignment of Assignor's Interest
Recorded: 2020-02-24
Pages: 2
Assignor
SCHAT, JAN-PETER
Executed: 2020-02-14
Assignee
NXP B.V.
HIGH TECH CAMPUS 60, EINDHOVEN, 5656-AG, NETHERLANDS
Covered Property
(1)
Logic and Flip-Flop Circuit Timing Margins Controlled Based on Scan-Pattern Transition Processing