Patent Assignment
Reel/Frame 052212/0500
Assignment of Assignor's Interest
Recorded: 2020-03-24
Pages: 6
Assignors
WADA, MAKOTO
Executed: 2020-03-13
MATSUMOTO, TAKASHI
Executed: 2020-03-13
SUGIURA, MASAHITO
Executed: 2020-03-13
IFUKU, RYOTA
Executed: 2020-03-13
Assignee
TOKYO ELECTRON LIMITED
AKASAKA BIZ TOWER, 3-1 AKASAKA 5-CHOME, MINATO-KU, TOKYO, 107-6325, JAPAN
Covered Property
(1)
Method of Making a Semiconductor Device Including a Graphene Barrier Layer Between Conductive Layers