Patent Assignment
Reel/Frame 053222/0001
Assignment of Assignor's Interest
Recorded: 2020-07-15
Pages: 4
Assignors
HU, CHIH-CHIA
Executed: 2020-05-15
CHEN, MING-FA
Executed: 2020-05-15
JAN, SEN-BOR
Executed: 2020-06-02
CHIANG, MENG-WEI
Executed: 2020-05-18
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO.8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK,, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Layout Design of Integrated Circuit with Through-Substrate Via
Patent:
11,080,455 →
Application:
16/924,195 →