Patent Assignment
Reel/Frame 053852/0695
Assignment of Assignor's Interest
Recorded: 2020-09-22
Pages: 2
Assignors
WU, GUO-HUEI
Executed: 2020-05-21
WANG, POCHUN
Executed: 2020-05-21
CHEN, CHIH-LIANG
Executed: 2020-05-27
TIEN, LI-CHUN
Executed: 2020-05-27
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK, HSINCHU, 300, TAIWAN
Covered Property
(1)
Semiconductor Device Having Buried Logic Conductor Type of Complementary Field Effect Transistor, Method of Generating Layout Diagram and System for Same