IP Library Assignment 054018/0217
Patent Assignment
Reel/Frame 054018/0217

Assignment of Assignor's Interest

Recorded: 2020-10-09 Pages: 3
Assignors
FAVOR, JOHN G.
Executed: 2020-10-06
SRINIVASAN, SRIVATSAN
Executed: 2020-10-06
Assignee
VENTANA MICRO SYSTEMS INC.
960 SARATOGA AVE, #206, SAN JOSE, CALIFORNIA, 95129
Covered Property (1)
Processor That Mitigates Side Channel Attacks by Refraining from Allocating an Entry in a Data Tlb for a Missing Load Address When the Load Address Misses Both in a Data Cache Memory and in the Data Tlb and the Load Address Specifies a Location Without a Valid Address Translation or Without Permission to Read from the Location
Application: 17/064,553 →
Publication: US 2022/0108013