IP Library Assignment 054450/0442
Patent Assignment
Reel/Frame 054450/0442

Assignment of Assignor's Interest

Recorded: 2020-11-23 Pages: 3
Assignors
TANWAR, ANSHUL
Executed: 2017-10-06
GARG, VINEET KUMAR
Executed: 2017-10-06
KRISHNA N, N V HARI
Executed: 2017-10-06
Assignee
CISCO TECHNOLOGY, INC.
170 WEST TASMAN DRIVE, SAN JOSE, CALIFORNIA, 95134-1706
Covered Property (1)
Measure and Improve Clock Synchronization Using Combination of Transparent and Boundary Clocks
Application: 17/102,234 →
Publication: US 2021/0075585