IP Library Assignment 055102/0158
Patent Assignment
Reel/Frame 055102/0158

Assignment of Assignor's Interest

Recorded: 2021-02-01 Pages: 4
Assignors
JENSEN, JAMES A.
Executed: 2014-05-06
GIFFORD, DAVID R.
Executed: 2014-05-16
ATKINSON, KEVIN E.
Executed: 2014-05-06
Assignee
SILICON SPACE TECHNOLOGY CORPORATION
1501 S. MOPAC EXPY., SUITE 350, AUSTIN, TEXAS, 78746
Covered Property (1)
Memory Circuit Incorporating Error Detection and Correction (Edac), Method of Operation, and System
Application: 15/048,701 →
Publication: US 2016/0246675
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Feb 1, 2021
From: SILICON SPACE TECHNOLOGY CORPORATION
To: SILICON SPACE TECHNOLOGY CORPORATION, D.B.A. VORAGO TECHNOLOGIES, INC.
Reel/Frame 055192/0747 →