Patent Assignment
Reel/Frame 055339/0250
Assignment of Assignor's Interest
Recorded: 2021-02-19
Pages: 3
Assignors
CHOKHANI, ARVIND
Executed: 2021-02-17
SWENTON, JOSEPH MICHAEL
Executed: 2021-02-17
MALAGI, SANTOSH SUBHASCHANDRA
Executed: 2021-02-17
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Sdd Atpg Using Fault Rules Files, Sdf and Node Slack for Testing an Ic Chip
Patent:
11,461,520 →
Application:
17/180,239 →