Patent Assignment
Reel/Frame 056327/0700
Assignment of Assignor's Interest
Recorded: 2021-05-24
Pages: 5
Assignors
LO, TSENG CHIN
Executed: 2018-06-05
CHANG, BO-SEN
Executed: 2018-06-05
CHEN, YUEH-YI
Executed: 2018-06-05
SUN, CHIH-TING
Executed: 2018-06-05
CHEN, YING-JUNG
Executed: 2018-06-05
LIN, KUNG-CHENG
Executed: 2018-06-05
CHANG, MENG LIN
Executed: 2018-06-05
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Integrated Circuit Overlay Test Patterns and Method Thereof