Patent Assignment
Reel/Frame 056719/0468
Assignment of Assignor's Interest
Recorded: 2021-06-30
Pages: 4
Assignors
JIANG, YU-WEI
Executed: 2021-06-14
LAI, SHENG-CHIH
Executed: 2021-06-14
YANG, FENG-CHENG
Executed: 2021-06-21
LIN, CHUNG-TE
Executed: 2021-06-14
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Method for Forming a Semiconductor Memory Structure Using a Liner Layer as an Etch Stop