Patent Assignment
Reel/Frame 056864/0651
Assignment of Assignor's Interest
Recorded: 2021-07-15
Pages: 2
Assignors
HSIEH, CHUNG-PENG
Executed: 2020-07-14
CHANG, CHIH-CHIANG
Executed: 2020-07-14
PENG, YUNG-CHOW
Executed: 2020-07-14
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Digitally Controlled Delay Line Circuit and Method