Patent Assignment
Reel/Frame 056865/0460
Assignment of Assignor's Interest
Recorded: 2021-07-15
Pages: 4
Assignors
HUANG, PO-HSIANG
Executed: 2019-10-15
CHEN, SHENG-HSIUNG
Executed: 2019-10-15
KO, CHIH-HSIN
Executed: 2019-10-21
CHANG, FONG-YUAN
Executed: 2019-10-15
WANN, CLEMENT HSINGJEN
Executed: 2019-10-22
TIEN, LI-CHUN
Executed: 2019-10-25
HSU, CHIA-MING
Executed: 2019-10-23
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Integrated Circuit Fin Layout Method