IP Library Assignment 057312/0106
Patent Assignment
Reel/Frame 057312/0106

Assignment of Assignor's Interest

Recorded: 2021-08-25 Pages: 26
Assignors
RACHMADY, WILLY
Executed: 2021-08-20
NASKAR, SUDIPTO
Executed: 2021-08-18
HUANG, CHENG-YING
Executed: 2021-08-25
DEWEY, GILBERT
Executed: 2021-08-24
RADOSVLJEVIC, MARKO
Executed: 2021-08-16
THOMAS, NICOLE K.
Executed: 2021-08-17
MORROW, PATRICK
Executed: 2021-08-23
ALAAN, URUSA
Executed: 2021-08-22
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Gate-To-Gate Isolation for Stacked Transistor Architecture via Selective Dielectric Deposition Structure
Application: 17/445,856 →
Publication: US 2023/0073078