Patent Assignment
Reel/Frame 059054/0641
Assignment of Assignor's Interest
Recorded: 2022-02-20
Pages: 6
Assignors
LEE, JUYUN
Executed: 2022-01-05
KALYANAMAHADEVI GOPALAN JAWARLAL, VISHNU
Executed: 2022-01-05
KIM, KANG JIK
Executed: 2022-01-07
RHEW, HYO GYUEM
Executed: 2022-01-07
PARK, JAE HYUN
Executed: 2022-01-07
Assignee
SAMSUNG ELECTRONICS CO., LTD.
129, SAMSUNG-RO, YEONGTONG-GU, SUWON-SI, GYEONGGI-DO, 16677, KOREA, REPUBLIC OF
Covered Property
(1)
Reset Synchronizing Circuit and Glitchless Clock Buffer Circuit for Preventing Start-Up Failure, and Iq Divider Circuit