Patent Assignment
Reel/Frame 059412/0762
Assignment of Assignor's Interest
Recorded: 2022-03-28
Pages: 6
Assignors
YANG, XIU-LI
Executed: 2019-12-30
WAN, HE-ZHOU
Executed: 2019-12-30
CHENG, KUAN
Executed: 2020-04-24
WU, CHING-WEI
Executed: 2020-01-06
Assignees
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
.8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
TSMC CHINA COMPANY LIMITED
4000, WEN XIANG ROAD, SONGJIANG, SHANGHAI, CHINA
Covered Property
(1)
Integrated Circuit with Asymmetric Arrangements of Memory Arrays