IP Library Assignment 059431/0005
Patent Assignment
Reel/Frame 059431/0005

Assignment of Assignor's Interest

Recorded: 2022-03-29 Pages: 4
Assignor
JOURDAN, STEPHAN J.
Executed: 2022-03-29
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Dynamic and Idle Power Reduction Sequence Using Recombinant Clock and Power Gating
Patent: 8,782,456 →
Application: 12/978,452 →
Publication: US 2011/0296222
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 18, 2022
From: TAN, SIN S.; SRINIVASAN, SRIKANTH T.; RADHAKRISHNAN, SIVAKUMAR; JOURDAN, STEPHAN J.
To: INTEL CORPORATION
Reel/Frame 059300/0571 →
Assignment of Assignor's Interest May 5, 2022
From: INTEL CORPORATION
To: MEDIATEK INC.
Reel/Frame 059828/0105 →