Patent Assignment
Reel/Frame 061439/0562
Assignment of Assignor's Interest
Recorded: 2022-10-17
Pages: 4
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
System and Method for Write Clock Double Data Rate Duty Cycle Correction
Patent:
12,183,427 →
Application:
17/967,040 →