Patent Assignment
Reel/Frame 062356/0551
Assignment of Assignor's Interest
Recorded: 2023-01-12
Pages: 4
Assignors
WU, SHANG-CHI
Executed: 2018-05-08
CHENG, CHITING
Executed: 2018-05-08
CHANG, JONATHAN TSUNG-YUNG
Executed: 2018-05-08
LIN, YANGSYU
Executed: 2018-04-17
SINANGIL, MAHMUT
Executed: 2019-10-14
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Bit Line Logic Circuits and Methods