Patent Assignment
Reel/Frame 062962/0056
Assignment of Assignor's Interest
Recorded: 2023-03-13
Pages: 6
Assignors
MCCRATE, JOSEPH MICHAEL
Executed: 2020-09-04
GLEIXNER, ROBERT JOHN
Executed: 2020-09-11
GIDUTURI, HARI
Executed: 2020-09-10
GHODSI, RAMIN
Executed: 2020-10-22
Assignee
MICRON TECHNOLOGY, INC.
8000 SOUTH FEDERAL WAY, BOISE, IDAHO, 83707
Covered Property
(1)
Memory Device Architecture Using Multiple Physical Cells Per Bit to Improve Read Margin and to Alleviate the Need for Managing Demarcation Read Voltages