Assignment of Assignor's Interest

Recorded: 2023-07-03 Pages: 3

Assignors

REYNOLDS, VINCE

Executed: 2022-09-12

FRAER, RANAN

Executed: 2022-09-12

BRAZ, ADRIANA

Executed: 2022-09-22

FARAH, HABEEB ANTON

Executed: 2022-09-13

Assignee

CADENCE DESIGN SYSTEMS, INC.

2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134

Covered Property (1)

Method and System for Bug Finding by Checking Liveness Properties of Circuits with Formal Verification

Patent: 12,518,076 →

Application: 17/956,723 →