Patent Assignment
Reel/Frame 066489/0017
Assignment of Assignor's Interest
Recorded: 2024-02-19
Pages: 3
Assignors
YANG, CHIH-CHUAN
Executed: 2020-06-10
YANG, CHANG-TA
Executed: 2020-06-10
WANG, PING-WEI
Executed: 2020-06-10
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Well Pick-Up Region Design for Improving Memory Macro Performance