Patent Assignment
Reel/Frame 066976/0418
Assignment of Assignor's Interest
Recorded: 2024-04-02
Pages: 12
Assignors
SARKAR, SUDIPTA
Executed: 2024-03-21
MCLAREN, ANGUS
Executed: 2024-03-21
S., MEENAKSHI
Executed: 2024-03-26
T K, PRIYA
Executed: 2024-03-22
RANGANATHA, SRIVATSA
Executed: 2024-03-22
RANJBAR, MOHAMMAD
Executed: 2024-03-28
LEE, PAUL
Executed: 2024-03-21
VERMA, SHWETABH
Executed: 2024-03-21
NG, GEORGE CHUNG FAI
Executed: 2024-04-02
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Subranging Digital to Time Converter-Based Fractional Phase Locked Loop Architecture
Application:
18/624,299 →