Patent Assignment
Reel/Frame 067457/0394
Assignment of Assignor's Interest
Recorded: 2024-05-18
Pages: 3
Assignor
LIN, CHIA-LIANG (LEON)
Executed: 2024-05-15
Assignee
REALTEK SEMICONDUCTOR CORP.
NO. 2, INNOVATION RD. II, SCIENCE-BASED INDUSTRIAL PARK, HSINCHU, 300, TAIWAN
Covered Property
(1)
Phase Lock Loop Having Low Clock Jitters
Patent:
12,407,353 →
Application:
18/667,405 →