IP Library Assignment 067619/0662
Patent Assignment
Reel/Frame 067619/0662

Assignment of Assignor's Interest

Recorded: 2024-06-04 Pages: 3
Assignors
PALIWAL, SHUBHAM
Executed: 2024-05-10
POLASA, RAKESH KUMAR
Executed: 2024-05-10
SATYANARAYANA, BURLE NAGA
Executed: 2024-05-10
VERKILA, SATISH ANAND
Executed: 2024-05-10
MANI, ALAGESAN
Executed: 2024-05-10
Assignee
SILICONCH SYSTEMS PVT LTD,
#119, 2ND FLOOR, 3RD CROSS, 1ST PHASE, RELIABLE RESIDENCY, HARALUR, BANGALORE, 560102, INDIA
Covered Property (1)
System and Method for Developing and Debugging a Silicon Production Test Program for Semiconductor Devices
Application: 18/733,701 →
Publication: US 2025/0321271
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Merger Apr 22, 2026
From: SILICONCH SYSTEMS PRIVATE LIMITED
To: L&T SEMICONDUCTOR TECHNOLOGIES LIMITED
Reel/Frame 075446/0549 →