IP Library Granted Patent US 7,729,462
Granted Patent B2
US 7,729,462 · App. 11/615,274 · Granted Jun 1, 2010

Fast re-synchronization techniques for DVB-H systems

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Quick Facts
Patent No.
US 7,729,462
App. No.
11/615,274
Filed
Dec 22, 2006
Granted
Jun 1, 2010
Kind
B2
Art Unit
2611
USPC
375/357
Abstract

A system and method of performing re-synchronization for a Digital Video Broadcasting over Handheld (DVB-H) receiver comprises performing a time division multiplexing (TDM) data burst transmission sequence on bits of data received by the DVB-H receiver; performing a data bit re-synchronization sequence on the DVB-H receiver; and reducing a re-acquisition time at every stage of the data bit re-synchronization sequence, wherein the reducing process results in a reduction in the time to perform the re-synchronization for the DVB-H receiver, wherein the reduction in the time to perform the re-synchronization for the DVB-H receiver is greater than one-half of the time required to perform the re-synchronization for the DVB-H receiver absent the reducing of the re-acquisition time at every stage of the data bit re-synchronization sequence.

Claims (52)

1. A method of performing re-synchronization for a Digital Video Broadcasting over Handheld (DVB-H) receiver, said method comprising:

performing a time division multiplexing (TDM) data burst transmission sequence on bits of data received by said DVB-H receiver;

performing a data bit re-synchronization sequence on said DVB-H receiver, wherein said data bit re-synchronization sequence comprises synchronization of said DVB-H receiver after DVB-H receiver wake up for receiving a next sequence of a data burst; and

reducing a re-acquisition time at every stage of said data bit re-synchronization sequence, wherein the reducing process results in a reduction in the time to perform said re-synchronization for said DVB-H receiver.

2. The method of claim 1 , wherein said reduction in the time to perform said re-synchronization for said DVB-H receiver is greater than one-half of the time required to perform said re-synchronization for said DVB-H receiver absent said reducing of said re-acquisition time at every stage of said data bit re-synchronization sequence.

3. The method of claim 1 , wherein said data bit re-synchronization sequence comprises:

performing an automatic gain control (AGC) lock process comprising measuring and comparing A/D output signal strength with a pre-set threshold;

performing a mode and guard detecting process comprising detecting a transmission mode and guard information;

performing a frequency offset estimation process comprising obtaining a fine-frequency offset information;

performing a transit parameter signaling (TPS) detection process comprising decoding TPS information to program blocks of said DVB-H receiver;

performing a timing and carrier loop lock process comprising adjusting timing and frequency offsets based on a digital phased lock loop; and

performing an equalizer delay process comprising estimating and equalizing channel state information.

4. The method of claim 3 , further comprising initializing an AGC control word to be a last value when said DVB-H receiver enters into a sleep mode of operation.

5. The method of claim 3 , further comprising forcing said mode and guard detection process by utilizing mode and guard values detected from an immediately preceding data burst.

6. The method of claim 3 , further comprising making the number of orthogonal frequency division multiplexing (OFDM) symbol correlations programmable to shorten initial FFT trigger point acquisition time and initial fine frequency offset estimation time.

7. The method of claim 3 , further comprising bypassing a continuous pilot correlation to find a coarse frequency offset by forcing said coarse frequency offset obtained from an immediately previous data burst.

8. The method of claim 3 , further comprising obtaining an OFDM symbol number and a frame number after said TPS detection process.

9. The method of claim 3 , further comprising using an on-chip timer to count OFDM symbols during a sleep mode of operation of said DVB-H receiver.

10. The method of claim 3 , further comprising initializing loop integrators with values at a time when said DVB-H receiver enter into a sleep mode of operation.

11. A program storage device readable by machine, tangibly and embodying a program of instructions executable by the machine to perform a method of performing re-synchronization for a Digital Video Broadcasting over Handheld (DVB-H) receiver, said method comprising:

performing a time division multiplexing (TDM) data burst transmission sequence on bits of data received by said DVB-H receiver;

performing a data bit re-synchronization sequence on said DVB-H receiver, wherein said data bit re-synchronization sequence comprises synchronization of said DVB-H receiver after wake up for receiving next sequence of data burst; and

reducing a re-acquisition time at every stage of said data bit re-synchronization sequence, wherein the reducing process results in a reduction in the time to perform said re-synchronization for said DVB-H receiver.

12. The program storage device of claim 11 , wherein said reduction in the time to perform said re-synchronization for said DVB-H receiver is greater than one-half of the time required to perform said re-synchronization for said DVB-H receiver absent said reducing of said re-acquisition time at every stage of said data bit re-synchronization sequence.

13. The program storage device of claim 11 , wherein said data bit re-synchronization sequence comprises:

performing an automatic gain control (AGC) lock process comprising measuring and comparing A/D output signal strength with a pre-set threshold;

performing a mode and guard detecting process comprising detecting a transmission mode and guard information;

performing a frequency offset estimation process comprising obtaining a fine-frequency offset information;

performing a transit parameter signaling (TPS) detection process comprising decoding TPS information to program blocks of said DVB-H receiver;

performing a timing and carrier loop lock process comprising adjusting timing and frequency offsets based on a digital phased lock loop; and

performing an equalizer delay process comprising estimating and equalizing channel state information.

14. The program storage device of claim 13 , further comprising initializing an AGC control word to be a last value when said DVB-H receiver enters into a sleep mode of operation.

15. The program storage device of claim 13 , wherein said method further comprises forcing said mode and guard detection process by utilizing mode and guard values detected from an immediately preceding data burst.

16. The program storage device of claim 13 , wherein said method further comprises making the number of orthogonal frequency division multiplexing (OFDM) symbol correlations programmable to shorten initial FFT trigger point acquisition time and initial fine frequency offset estimation time.

17. The program storage device of claim 13 , wherein said method further comprises bypassing a continuous pilot correlation to find a coarse frequency offset by forcing said coarse frequency offset obtained from an immediately previous data burst.

18. The program storage device of claim 13 , wherein said method further comprises obtaining an OFDM symbol number and a frame number after said TPS detection process.

19. The program storage device of claim 13 , wherein said method further comprises using an on-chip timer to count OFDM symbols during a sleep mode of operation of said DVB-H receiver, and wherein said method further comprises initializing loop integrators with values at a time when said DVB-H receiver enter into a sleep mode of operation.

20. A system of performing re-synchronization for a Digital Video Broadcasting over Handheld (DVB-H) receiver, said system comprising:

a first processor that performs a time division multiplexing (TDM) data burst transmission sequence on bits of data received by said DVB-H receiver;

a second processor that performs a data bit re-synchronization sequence on said DVB-H receiver, wherein said data bit re-synchronization sequence comprises synchronization of said DVB-H receiver after wake up for receiving a next sequence of a data burst, and wherein said data bit re-synchronization sequence comprises:

performing an automatic gain control (AGC) lock process comprising measuring and comparing A/D output signal strength with a pre-set threshold, wherein an AGC control word is initialized to be a last value when said DVB-H receiver enters into a sleep mode of operation;

performing a mode and guard detecting process comprising detecting a transmission mode and guard information, wherein said mode and guard detection process is forced by utilizing mode and guard values detected from an immediately preceding data burst;

performing a frequency offset estimation process comprising obtaining a fine-frequency offset information, wherein the number of orthogonal frequency division multiplexing (OFDM) symbol correlations is programmed to shorten initial FFT trigger point acquisition time and initial fine frequency offset estimation time;

performing a transit parameter signaling (TPS) detection process comprising decoding TPS information to program blocks of said DVB-H receiver;

obtaining an OFDM symbol number and a frame number;

performing a timing and carrier loop lock process comprising adjusting timing and frequency offsets based on a digital phased lock loop; and

performing an equalizer delay process comprising estimating and equalizing channel state information;

a third processor that reduces a re-acquisition time at every stage of said data bit re-synchronization sequence, wherein the reducing process results in a reduction in the time to perform said re-synchronization for said DVB-H receiver; and

an on-chip timer that counts OFDM symbols during said sleep mode of operation of said DVB-H receiver,

wherein said reduction in the time to perform said re-synchronization for said DVB-H receiver is greater than one-half of the time required to perform said re-synchronization for said DVB-H receiver absent said reducing of said re-acquisition time at every stage of said data bit re-synchronization sequence,

wherein a continuous pilot correlation is bypassed to find a coarse frequency offset by forcing said coarse frequency offset obtained from an immediately previous data burst, and

wherein loop integrators are initialized with values at a time when said DVB-H receiver enter into a sleep mode of operation.

Assignments (1)
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
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