IP Library Granted Patent US 7,064,566
Granted Patent B2
US 7,064,566 · App. 09/042,606 · Granted Jun 20, 2006

Probe card assembly and kit

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Quick Facts
Patent No.
US 7,064,566
App. No.
09/042,606
Granted
Jun 20, 2006
Kind
B2
Abstract

In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Claims (32)

1. An apparatus for providing external equipment with signal access to bond pads of an integrated circuit implemented on a wafer, wherein the wafer is formed substantially of a semiconductor material having a first coefficient of thermal expansion, the apparatus comprising:

a probe board;

a semiconductor substrate having a planar surface;

a plurality of conductive probes mounted on the planar surface of the semiconductor substrate for contacting the bond pads; and

first means for providing signal paths between the probe board and the plurality of conductive probes,

wherein each of the plurality of conductive probes comprises a resilient, conductive, spring contact.

2. The apparatus in accordance with claim 1 wherein the semiconductor substrate and the wafer comprise the same semiconductor material.

3. The apparatus in accordance with claim 2 wherein the semiconductor material comprises silicon.

4. The apparatus in accordance with claim 1 wherein the semiconductor substrate has a first coefficient of thermal expansion substantially similar to said first coefficient of thermal expansion.

5. The apparatus in accordance with claim 1 wherein the first means comprises:

a plurality of contacts formed on the planar surface of the semiconductor substrate;

second means formed on the semiconductor substrate for providing signal paths between the plurality of contacts and the plurality of conductive probes; and

third means for providing signal paths between the plurality of contacts and the probe board.

6. The apparatus in accordance with claim 1 further comprising means connected between the semiconductor substrate and the probe board for resiliently supporting the semiconductor substrate.

7. The apparatus in accordance with claim 1 wherein at least one of the signal paths provided by said first means comprises a transistor formed on the semiconductor substrate.

8. The apparatus in accordance with claim 1 further comprising means connected between the semiconductor substrate and the probe board for resiliently supporting the semiconductor substrate.

9. The apparatus in accordance with claim 8 wherein at least one of the signal paths provided by said first means comprises a transistor formed on the semiconductor substrate.

10. The apparatus in accordance with claim 8 wherein at least one of the signal paths provided by said first means comprises an active device formed on the semiconductor substrate.

11. The apparatus in accordance with claim 1 wherein said probe board is a printed circuit board.

12. The apparatus in accordance with claim 1 wherein at least one of the signal paths provided by said first means comprises an active device formed on the semiconductor substrate.

13. An apparatus for providing external equipment with signal access to bond pads of an integrated circuit implemented on a wafer, wherein the wafer is formed substantially of a semiconductor material having a first coefficient of thermal expansion, the apparatus comprising:

a probe board;

a semiconductor substrate having a planar surface;

a plurality of conductive probes mounted on the planar surface of the semiconductor substrate for contacting the bond pads; and

first means for providing signal paths between the probe board and the plurality of conductive probes, comprising

a plurality of contacts formed on the planar surface of the semiconductor substrate;

second means formed on the semiconductor substrate for providing signal paths between the plurality of contacts and the plurality of conductive probes; and

third means for providing signal paths between the plurality of contacts and the probe board, the third means comprising:

a plurality of flexible signal conductors;

a first connector for providing signal paths between the flexible signal conductors and the plurality of contacts formed on the planar surface of the semiconductor substrate; and

a second connector for providing signal paths between the plurality of flexible signal conductors and the probe board.

14. The apparatus in accordance with claim 13 further comprising means for resiliently linking the semiconductor substrate to the probe board.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2025
From: HSBC BANK USA, NATIONAL ASSOCIATION
To: FORMFACTOR, INC.
Reel/Frame 072853/0001 →
SECURITY INTEREST IN UNITED STATES PATENTS AND TRADEMARKS Recorded Jul 12, 2016
From: FORMFACTOR, INC.; ASTRIA SEMICONDUCTOR HOLDINGS, INC.; CASCADE MICROTECH, INC.; MICRO-PROBE INCORPORATED
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 039184/0280 →