Semiconductor device and a memory system including a plurality of IC chips in a common package
View Patent ↗A semiconductor device is formed by laminating two semiconductor chips with the rear surfaces thereof provided face to face. Each semiconductor chip is provided with an outer lead for clock enable to which the clock enable signal and chip select signal are individually input. On the occasion of making access to one semiconductor chip, the other semiconductor chip is set to the low power consumption mode by setting the clock enable signal and chip select signal to the non-active condition.
1. A semiconductor device comprising:
a resin sealing material;
two semiconductor chips located at the inside of said resin sealing material, each chip having an external terminal formed on a circuit forming surface thereof; and
a first lead extending to the inside and outside of said resin sealing material for transmitting a clock signal in common to said two chips,
wherein said first lead is branched at least to two branching leads within said resin sealing material, said one first branching lead is fixed to the circuit forming surface of one semiconductor chip and is then connected to the external terminal of the circuit forming surface, the other first branching lead is fixed to the circuit forming surface of the other semiconductor chip and connected to the external terminal of the front surface, said two semiconductor chips are laminated with the respective rear surfaces provided face to face and a pair of second leads are provided to input a pair of chip select signals for individually selecting said two semiconductor chips.
2. A semiconductor device according to claim 1 , wherein said external terminal and said first lead are connected via a conductive wire.
3. A semiconductor device according to claim 1 , further comprising a pair of third leads to which a pair of clock enable signals corresponding to said two semiconductor chips are input.
4. A semiconductor device:
a resin sealing material;
first and second semiconductor chips located inside of said resin sealing material, each chip having an external terminal formed on a circuit forming surface thereof;
a first lead extending to the inside and outside of said resin sealing material to transmit a first clock signal and to couple to said external terminal of said first semiconductor chip; and
a second lead extending to the inside and outside of said resin sealing material to transmit a second clock signal and to couple to said external terminal of said second semiconductor chip,
wherein said first and second semiconductor chips are laminated to one another at respective rear surfaces thereof and are bonded by a polyamide.