Power supply for universal serial bus interface with programmable bus pullup resistor
View Patent ↗An apparatus comprising a power supply device configured to generate a voltage. The voltage may comprise either (i) a standard voltage level or (ii) a power down voltage level. The power down voltage level may be configured to reduce current consumption.
1. An apparatus comprising:
a power supply device configured to generate a voltage, wherein said voltage comprises either (i) a standard voltage level when in a first mode and (ii) a power down voltage level when in a second mode, wherein (i) said power down voltage level is configured to reduce current consumption, (ii) a programmable resistor pulls up a bus pullup resistor on a bus external to said power supply device when in said second mode and (iii) said programmable resistor is controlled by a register loaded from a nonvolatile memory.
2. The apparatus according to claim 1 , wherein said power supply device is configured to power an interface.
3. The apparatus according to claim 2 , wherein said interface comprises a Universal Serial Bus interface.
4. The apparatus according to claim 1 , wherein said power supply device is configured in response to an indication signal.
5. The apparatus according to claim 4 , wherein said indication signal comprises a power down indication signal.
6. The apparatus according to claim 4 , wherein said indication signal indicates said first mode of operation or said second mode of operation.
7. The apparatus according to claim 6 , wherein said first mode of operation comprises a standard mode and said second mode of operation comprises a power down mode.
8. The apparatus according to claim 1 , further comprising an interface and a bus configured to receive said voltage.
9. The apparatus according to claim 1 , wherein said power supply device comprises:
a power supply, wherein said programmable resistor and said power supply are configured to generate said voltage.
10. The apparatus according to claim 9 , wherein said register comprises a trimbits register and said programmable resistor comprises a programmable pullup resistor.
11. The apparatus according to claim 9 , wherein said programmable resistor and said power supply are configured in response to a power down indication signal.
12. The apparatus according to claim 1 , wherein said programmable resistor is configured to provide compensation for process variations.
13. The apparatus according to claim 1 , wherein said power supply device comprises an on chip USB power supply.
14. The apparatus according to claim 1 , wherein said power supply device is further configured to allow a supply voltage to be turned off.
15. The apparatus according to claim 1 , wherein said pullup resistor is implemented within a bus portion.
16. The apparatus according to claim 15 , wherein said bus portion is configured to receive said voltage.
17. An apparatus comprising:
means for generating a voltage; and
means for (i) reducing current consumption in a first mode when said voltage comprises a power down voltage level and (ii) not reducing current consumption in a second mode when said voltage comprises a standard voltage level, wherein (i) programmable resistor pulls up a pullup resistor on a bus external to said voltage generating means when in said first mode and (ii) said programmable resistor is controlled by a register loaded from a nonvolatile memory.
18. A method for supplying a voltage level comprising the steps of:
(A) generating a voltage;
(B) reducing current consumption in a first mode when said voltage comprises a power down voltage level;
(C) not reducing current consumption in a second mode when said voltage comprises a standard voltage level; and
(D) pulling up a pullup resistor on a bus external to said power supply device using and a programmable resistor when in said first mode and said programmable resistor is controlled by a register loaded from a nonvolatile memory.
19. A power supply comprising:
a primary power supply configured to generate either (i) a standard voltage level on a supply line when in a first mode and (ii) a power down voltage level on said supply line when in a second mode, wherein (i) said power down voltage level is configured to reduce current consumption; and
a secondary power supply comprising a programmable resistor, a register and a nonvolatile memory, wherein (i) said secondary power supply powers an external bus through said supply line when said primary power supply is in said second mode and (ii) said programmable resistor is controlled by a register loaded from a nonvolatile memory.