IP Library Granted Patent US 7,094,657
Granted Patent B1
US 7,094,657 · App. 09/652,841 · Granted Aug 22, 2006

Method for protecting against oxidation of a conductive layer in said device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,094,657
App. No.
09/652,841
Granted
Aug 22, 2006
Kind
B1
Abstract

In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from being adsorbed onto the surface of the first conductive layer. In one embodiment, a second conductive layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates an oxide formed between the two layers as a result of subsequent thermal treatments. In another embodiment, a dielectric layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates the ability of the first conductive layer to incorporate oxygen from the dielectric.

Claims (18)

1. A method of treating a semiconductor device, comprising:

providing a capacitor having a first plate, a dielectric over the first plate, and a second plate over the dielectric, the second plate including first and second conductive layers;

exposing said first conductive layer to a material selected from the group consisting of phosphine, and methysilane to reduce an ability of the first conductive layer to associate with oxygen; and

forming the second conductive layer on the first conductive layer, the second conductive layer being formed after the first conductive layer has been exposed to the material from the group.

2. The method of claim 1 wherein the first conductive layer and the second conductive layer form a top plate of the capacitor.

3. The method of claim 1 wherein the dielectric comprises tantalum pentoxide.

4. The method of claim 1 wherein the first conductive layer comprises tungsten nitride.

5. The method of claim 1 the first plate comprises a hemispherical silicon grain layer and a tungsten nitride layer.

6. The method of claim 1 wherein the second conductive layer comprises a polysilicon layer.

7. The method of claim 6 wherein the second conductive layer further comprises a BPSG layer formed on the polysilicon layer.

8. A method of treating a semiconductor device, comprising:

providing a capacitor having a first plate, a dielectric on the first plate, a first conductive layer on the dielectric with the first conductive layer having an ability to associate with oxygen, an oxide layer on the first conductive layer, and a second conductive layer on the oxide layer;

exposing the capacitor to a thermal process; and

prior to exposure to the thermal process and prior to-forming the second conductive layer on the first conductive layer, exposing the first conductive layer to a material selected from the group consisting of phosphine, and methylsilane to reduce an amount of oxygen associated with the first conductive material during formation of the second conductive layer and reduce a thickness of the oxide layer subsequently formed between the first and second conductive layers during exposure of the capacitor to the thermal process.

9. The method of claim 8 wherein the thickness of the oxide layer is less than approximately 10 angstroms.

10. The method of claim 8 wherein the oxide layer comprises silicon dioxide.

11. The method of claim 8 wherein the dielectric comprises tantalum pentoxide.

12. The method of claim 8 wherein the first conductive layer comprises tungsten nitride.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2016
From: MICRON TECHNOLOGY, INC.
To: APTINA IMAGING CORPORATION
Reel/Frame 040275/0970 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2016
From: AGARWAL, VISHNU K.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 040261/0907 →