IP Library Granted Patent US 6,898,236
Granted Patent B1
US 6,898,236 · App. 09/670,490 · Granted May 24, 2005

System and method for adaptively accommodating a high amplitude downstream signal in a DSL modem

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Quick Facts
Patent No.
US 6,898,236
App. No.
09/670,490
Granted
May 24, 2005
Kind
B1
Abstract

A system and method are disclosed for adaptively accommodating a high amplitude downstream signal in a DSL modem. High amplitude downstream signals are common with local loop lengths of less than about 6,000 feet and can saturate DSL modem components and impair DSL service if not effectively accommodated. In general, a DSL system detects a high amplitude downstream DSL signal and adjusts a DSL modem analog front end in response to the detected high amplitude downstream DSL signal so that analog front end components of a DSL modem are not saturated by the high amplitude downstream DSL signal. Pursuant to one embodiment, a digital signal processor detects the high amplitude DSL signal and, in response, decreases a gain of a first stage receiver to accommodate the high amplitude downstream DSL signal. Another embodiment introduces additional attenuation of the downstream DSL signal to attenuate high amplitude downstream DSL signals before they enter first stage receiver amplifier circuits.

Claims (15)

1. An automatically adjustable DSL modem for adaptively accommodating a high amplitude downstream DSL signal, comprising:

a data processor for determining an amplitude of the downstream DSL signal; and

a first stage receiver coupled to and controlled by the data processor;

the first stage receiver comprising:

an adjustable gain so that the data processor may decrease the gain of the first stage receiver in response to detecting a high amplitude downstream DSL signal; and

a pair of amplifier circuits, each amplifier circuit including a switching device coupled to and controlled by the data processor for selectively switching in additional resistance to decrease the gain of the amplifier circuit in response to detection of a high amplitude downstream DSL signal.

2. The automatically adjustable DSL modem according to claim 1 , further comprising an analog front end including a hybrid and a receive filter, the first stage receiver being disposed between the hybrid and the receive filter.

3. An automatically adjustable DSL modem for adaptively accommodating a high amplitude downstream DSL signal, comprising:

a data processor for determining an amplitude of the downstream DSL signal; and

a loss circuit coupled to and controlled by the data processor for attenuating the downstream signal in response to the data processor determining that a high amplitude downstream DSL signal is present, wherein the loss circuit further comprises a switching device coupled to a resistor, the switching device being coupled to and controlled by the data processor to switch in the resistor to selectively attenuate the downstream DSL signal.

4. A DSL modem for converting a downstream DSL analog signal to digital data and for converting digital data to an analog signal, comprising:

a data processor for detecting the amplitude of the downstream analog signal, the data processor being configured to determine whether the amplitude of the downstream analog signal is greater than a predetermined threshold;

an analog front end coupled to and controlled by the data processor for receiving the downstream analog signals;

the date processor being configured to adjust the analog front end according to whether the amplitude of the downstream signal is greater than a predetermined threshold to prevent the analog front end from being saturated by high amplitude downstream signals; and

a passive loss circuit coupled to and controlled by the data processor for attenuating the downstream signal in response to the data processor detecting a downstream signal greater than the predetermined threshold.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2011
From: BROADCOM INTERNATIONAL LIMITED
To: BROADCOM CORPORATION
Reel/Frame 026960/0275 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2011
From: 2WIRE, INC.
To: BROADCOM INTERNATIONAL LIMITED; BROADCOM CORPORATION
Reel/Frame 026960/0171 →
SECURITY AGREEMENT Recorded Aug 1, 2001
From: 2WIRE, INC.
To: SILICON VALLEY BANK
Reel/Frame 012019/0490 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2000
From: SUN, TING
To: 2WIRE, INC.
Reel/Frame 011133/0122 →