Granted Patent
Utility
US 6,532,179
· Confirmation No. 5220
AN INPUT SIGNAL RECEIVING CIRUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT
Inventor:
Yoshimasa Yagishita
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-03-23 | TRNA |
Transmittal of New Application | 1 | View | |
| 2001-03-23 | SPEC |
Specification | 12 | View | |
| 2001-03-23 | CLM |
Claims | 1 | View | |
| 2001-03-23 | ABST |
Abstract | 1 | View | |
| 2001-03-23 | DRW |
Drawings-only black and white line drawings | 6 | View | |
| 2001-03-23 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Yoshimasa Yagishita
Kawasaki, JAPAN
Attorneys & Agents of Record
Classification
USPC
365/194
Prosecution
- Examiner
- PHUNG, ANH K
- Art Unit
- 2824
- Docket No.
- 108397-00034
- Confirmation No.
- 5220
Foreign Priority
2000-097598
·
2000-03-31
·
JAPAN
Publication
- Pub. No.
- US20010026479A1
- Pub. Date
- 2001-10-04
Patent Term Adjustment
-88days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2015-04-27
CHANGE OF NAME
Recorded 2010-07-22
from
FUJITSU LIMITED
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2008-12-12
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Quick Facts
- Patent No.
- US 6,532,179
- App. No.
- 09/814,771
- Filed
- 2001-03-23
- Granted
- 2003-03-11
- Pub. No.
- US20010026479A1
- Examiner
- PHUNG, ANH K
- Art Unit
- 2824
- PTA
- -88 days
External Links