IP Library Granted Patent US 6,657,461
Granted Patent Utility
US 6,657,461 · Confirmation No. 4848

SYSTEM AND METHOD FOR HIGH SPEED INTEGRATED CIRCUIT DEVICE TESTING UTILIZING A LOWER SPEED TEST ENVIRONMENT

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Code Description Pages PDF
2003-09-30 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-09-17 LET. Miscellaneous Incoming Letter 2 View
2003-09-17 DRW Drawings-only black and white line drawings 10 View
2001-05-11 DRW Drawings-only black and white line drawings 10 View
2001-03-22 TRNA Transmittal of New Application 3 View
2001-03-22 SPEC Specification 20 View
2001-03-22 CLM Claims 4 View
2001-03-22 ABST Abstract 1 View
2001-03-22 DRW Drawings-only black and white line drawings 10 View
2001-03-22 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,657,461
App. No.
09/815,146
Filed
2001-03-22
Granted
2003-12-02
Pub. No.
US20020135393A1
Art Unit
2816
PTA
-28 days