Granted Patent
Utility
US 6,434,058
· Confirmation No. 9100
SEMICONDUCTOR INTEGRATED CIRCUIT
Inventor:
Kazuyuki Kanazashi
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-03-27 | TRNA |
Transmittal of New Application | 1 | View | |
| 2001-03-27 | SPEC |
Specification | 18 | View | |
| 2001-03-27 | CLM |
Claims | 2 | View | |
| 2001-03-27 | ABST |
Abstract | 1 | View | |
| 2001-03-27 | DRW |
Drawings-only black and white line drawings | 8 | View | |
| 2001-03-27 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Kazuyuki Kanazashi
Kawasaki, JAPAN
Attorneys & Agents of Record
Classification
USPC
365/189.07
Prosecution
- Examiner
- PHAN, TRONG Q
- Art Unit
- 2818
- Docket No.
- 108397-00033
- Confirmation No.
- 9100
Foreign Priority
2000-088390
·
2000-03-28
·
JAPAN
Publication
- Pub. No.
- US20010026475A1
- Pub. Date
- 2001-10-04
Patent Term Adjustment
-120days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2015-04-27
CHANGE OF NAME
Recorded 2010-07-22
from
FUJITSU LIMITED
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2008-12-12
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Quick Facts
- Patent No.
- US 6,434,058
- App. No.
- 09/817,179
- Filed
- 2001-03-27
- Granted
- 2002-08-13
- Pub. No.
- US20010026475A1
- Examiner
- PHAN, TRONG Q
- Art Unit
- 2818
- PTA
- -120 days
External Links